ES96G Hardware Configuration and Definition (HCD) for z/OS
Duration: 4 Days
Level: Basic
Audience: Systems Administrator
Next Sessions
Start (YYYY-MM-DD) | End (YYYY-MM-DD) | Language | Amount | |
---|---|---|---|---|
2024-05-06 | 2024-05-09 | English | 2900 EUR | |
2024-05-20 | 2024-05-23 | English | 2900 EUR | |
2024-06-03 | 2024-06-06 | English | 2900 EUR | |
2024-06-17 | 2024-06-20 | English | 2900 EUR | |
2024-07-01 | 2024-07-04 | English | 2900 EUR | |
2024-07-15 | 2024-07-18 | English | 2900 EUR | |
2024-07-29 | 2024-08-01 | English | 2900 EUR | |
2024-08-12 | 2024-08-15 | English | 2900 EUR | |
2024-08-26 | 2024-08-29 | English | 2900 EUR | |
2024-09-09 | 2024-09-12 | English | 2900 EUR | |
2024-09-23 | 2024-09-26 | English | 2900 EUR | |
2024-10-07 | 2024-10-10 | English | 2900 EUR | |
2024-10-21 | 2024-10-24 | English | 2900 EUR | |
2024-11-04 | 2024-11-07 | English | 2900 EUR | |
2024-11-18 | 2024-11-21 | English | 2900 EUR | |
2024-12-02 | 2024-12-05 | English | 2900 EUR | |
2024-12-16 | 2024-12-19 | English | 2900 EUR |
Overview
Learn to work with the Hardware Configuration Definition (HCD) function for z/OS, and to plan and initiate dynamic reconfiguration of your zSeries hardware environment. Learn to use the HCD dialogs of z/OS to create an Input/Output (I/O) configuration and dynamically alter the I/O configuration. Learn about the creation of an I/O Configuration Dataset (IOCDS) and various reports that HCD can build. Use a z/OS system to reinforce lecture topics and to practice working with the HCD dialogs. Hands-on lab projects may be done in teams depending on the number of attendees and location.
Prerequisites
You should have:
- A basic knowledge of z/OS and I/O configuration
This knowledge can be developed on the job, or by taking Fundamental System Skills in z/OS (ES10A).
- Describe new zSeries processor technology
- Code new zSeries processors (z9 to z196)
- Code FICON channels and FICON CTCs
- Code Coupling Facilities (CF) and CF links
- Code cascaded FICON Directors
- Create an IODF work file on a z processor from scratch
- Use CHPID mapping tool to create a validated work IODF
- Use work IODF and create a production IODF
- Perform Dynamic I/O changes on a real z/OS system
- Build a LOADxx parmlib member for initial program load (IPL)
- View configuration graphically
- Create appropriate configuration reports
Day 1
- Welcome
- Unit 1: HCD introduction
- Unit 2: IOCP and MVSCP macro review
- Unit 3: HCD dialog
- Unit 4: LPAR and logical control unit concepts
- Unit 5: OSAs, OSA/ICC and HiperSockets
- Unit 6: Review of zSeries hardware
- Exercise 1: Overview of lab environment
- Exercise 2: HCD familiarity
Day 2
- Unit 7: zSeries I/O architecture: Logical channel subsystems
- Unit 8: Advanced DASD concepts: EAV/PAV and multiple subchannel sets
- Unit 9: FICON, FICON CTCs, and FICON directors
- Exercise 3: Coding a zSeries 2817
- Exercise 4: Adding FICON directors to your configuration (optional)
- Exercise 5: Incremental migration from IOCP deck (optional)
Day 3
- Unit 10: HCD implementation and migration
- Unit 11: IPL and LOADxx member
- Unit 12: Dynamic I/O reconfiguration
- Unit 13: z196 HCD and using CMT
- Exercise 6: Building a LOADxx member
- Exercise 7: Perform dynamic I/O
Day 4
- Unit 14: FICON CTCs for sysplex
- Unit 15: HCD and Parallel Sysplex
- Exercise 8: Coding a 2817 using the CMT
- Exercise 9: Coding CF coupling links
- Exercise 10: Coding sysplex FICON CTCs